HPS2FPGA second DeTrI interface to HPS

Expand the DeTrI system to support a second (high performance) interface from the HPS:

Jargon:

DeTrI : Device Tree Interconnect : The abstracted register bus on the FPGA that connects to the HPS. The DeTrI system extracts the registers from the elaborated VHDL design, automatically assigns them addresses, and generates a device tree file to give to linux.

HPS : Hard Processor System : The quad core ARM microcontroller that is in the Stratix10 SoC. This runs linux.

Note: May need some help/direction from Mark to integrate with IP subsystem.