Details
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Feature
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Not Assigned
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None
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1
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5
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0
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Team_CIPA
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Sprint 1
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4.3
Description
Expand the DeTrI system to support a second (high performance) interface from the HPS:
Jargon:
DeTrI : Device Tree Interconnect : The abstracted register bus on the FPGA that connects to the HPS. The DeTrI system extracts the registers from the elaborated VHDL design, automatically assigns them addresses, and generates a device tree file to give to linux.
HPS : Hard Processor System : The quad core ARM microcontroller that is in the Stratix10 SoC. This runs linux.
Note: May need some help/direction from Mark to integrate with IP subsystem.
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