Details
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Feature
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Not Assigned
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None
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Obs Mgt & Controls
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8
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8
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4.125
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Team_CIPA
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Sprint 5
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10.6
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Stories Completed, Integrated, BDD Testing Passes (no errors), Outcomes Reviewed, Demonstrated, Satisfies Acceptance Criteria, Accepted by FO
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TDC Team_CIPA
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SPO-1006
Description
Implement TDC Corner Turn IP blocks and M&C software including:
- pre-corner turn in on-chip memory
- DDR4 main corner turn
- fine channel distribution post corner-turn
- selection on fine channels destined for one FPGA to be output via RDMA
Integrate corner turn IP blocks with existing VCC Build 2 components.
Update VCC Build 2 GUI to control and monitor corner turn IP blocks
Update Fine Channel Analysis Tool to interpret data in post-corner turn order.
Verify that data is correct by observing the expected spectrum in the fine channels.