TDC MVP1 Build 1 - Execute Test Plan (Part 2)

Have written a substantial amount of software to configure the FPGA, receive visibilities using SPEAD, then analyse the data (with pandas) and plot (with plotly). This is executed from a jupyter notebook. The notebook allows you to configure the test, setting parameters for the BITE and data-path configuration.  A python script run_tests.py will run through the notebook multiple times enabling each of the test configurations in turn. When a notebook execution is complete, it is rendered as an html document in the results directory The html renderings of the notebooks are attached to the respective Jira story tickets. Code is committed in the tdc_vcc_processing repository in the hw_testing directory. https://gitlab.drao.nrc.ca/SKA/Mid.CBF/FW/persona/tdc_vcc_processing/-/tree/hw_testing/hw_testing Some additional work has been done to bring up 4 FSP paths. These can be used to simultaneously process 4 frequency slices as 4 different subarrays.  This is used for test 0.6 to run identical data through with different integration times.