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  1. SAFe Program
  2. SP-916

TALON Infrastructure - FPGA Configuration using HPS (Part 3)

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      The completion of the TALON-DX board support package is critical to users of the TALON-DX board.  These users include:

      1. CIPA team developing TALON Demonstration Correlator (TDC)
      2. DSH SPFRx Team developing Band 1/2 Digitizer prototype

      Remote bitstream management and configuration of the Intel Stratix 10 FPGA on the TALON-DX board is one of the key features of the TALON infrastructure. 

      Show
      The completion of the TALON-DX board support package is critical to users of the TALON-DX board.  These users include: CIPA team developing TALON Demonstration Correlator (TDC) DSH SPFRx Team developing Band 1/2 Digitizer prototype Remote bitstream management and configuration of the Intel Stratix 10 FPGA on the TALON-DX board is one of the key features of the TALON infrastructure. 
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      Linux kernel 5.0 (or later version supported by Intel) with ip_subsystem is successfully running on HPS.

      FPGA can be programmed via HPS - this includes ability to select which of the  bitstreams on the SD card should be used to re-program FPGA.

      GUI / TANGO Devices / ip_subsystem implemented to support bitstream configuration.

      Remote bitstream configuration of the FPGA on TALON-DX board is demonstrated using the GUI and/or CLI.

      Show
      Linux kernel 5.0 (or later version supported by Intel) with ip_subsystem is successfully running on HPS. FPGA can be programmed via HPS - this includes ability to select which of the  bitstreams on the SD card should be used to re-program FPGA. GUI / TANGO Devices / ip_subsystem implemented to support bitstream configuration. Remote bitstream configuration of the FPGA on TALON-DX board is demonstrated using the GUI and/or CLI.
    • 2
    • 2
    • 14
    • Team_CIPA
    • Sprint 5
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      FPGA configuration and re-configuration via HPS using the U-boot kernel was successfully demonstrated (see AT5-391).

      The ultimate goal is to be able to configure the FPGA via HPS using Linux, so that FPGA configuration (programming) can be controlled remotely from the user computers and by the software running on HPS. That was not achieved in PI6, we are able to configure the FPGA using Linux, but the subsequent re-configuration result in Linux crashes (refer to the story AT5-275 for details).

      Detailed information:
      The outcomes of the Story AT5-275 have been documented, although not complete, the story has been marked as done, a clone has been created (AT5-404) and attached to the Feature SP-957.
      The outstanding stories AT5-387 (FPGA programming from HPS command line) and AT5-380 (demo) have been detached from this feature and attached to SP-957.

      Work on SP-957 will continue in PI7.

      Show
      FPGA configuration and re-configuration via HPS using the U-boot kernel was successfully demonstrated (see AT5-391). The ultimate goal is to be able to configure the FPGA via HPS using Linux, so that FPGA configuration (programming) can be controlled remotely from the user computers and by the software running on HPS. That was not achieved in PI6, we are able to configure the FPGA using Linux, but the subsequent re-configuration result in Linux crashes (refer to the story AT5-275 for details). Detailed information: The outcomes of the Story AT5-275 have been documented, although not complete, the story has been marked as done, a clone has been created (AT5-404) and attached to the Feature SP-957 . The outstanding stories AT5-387 (FPGA programming from HPS command line) and AT5-380 (demo) have been detached from this feature and attached to SP-957 . Work on SP-957 will continue in PI7.
    • 10.5
    • Stories Completed, Integrated, Outcomes Reviewed, Demonstrated, Satisfies Acceptance Criteria, Accepted by FO
    • PI22 - UNCOVERED

    • TALON-Infra Team_CIPA goal_O3

    Description

      Implement software to provide remote bitstream management and configuration of the Intel Stratix 10 FPGA on the TALON-DX board using facilities provided by Linux running on the embedded processor (HPS).  Tasks include:

      1. Migrate to Linux Kernel 5 (the latest supported by Intel). This was completed in AT5-273.
      2. Test and debug ip_subsystem / libip FPGA configuration software
      3. Demonstrate the FPGA configuration via HPS. 
      4. Implement and test TANGO devices to control FPGA configuration
      5. Implement and test GUI to provide remote FPGA configuration capabilities
      6. Demonstrate Talon-DX FPGA bitstream configuration capabilities via HPS using GUI and TANGO Device Server.

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                v.mohile Mohile, Vivek
                m.pleasance Pleasance, Michael
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                Feature Progress

                  Story Point Burn-up: (100.00%)

                  Feature Estimate: 2.0

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                  Total210.0

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