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  1. SAFe Program
  2. SP-686

TDC standardization of the firmware development environment and CI

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      Standardization of the development environment will facilitate code re-use, code reviews, and continuous integration. 

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      Standardization of the development environment will facilitate code re-use, code reviews, and continuous integration. 
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      Workflow for firmware simulation and build is integrated into the CI pipeline in GitLab. It allows build on demand and testing. Test metrics to validate DoD are available from the pipeline

      Show
      Workflow for firmware simulation and build is integrated into the CI pipeline in GitLab. It allows build on demand and testing. Test metrics to validate DoD are available from the pipeline
    • 3
    • 3
    • 2.667
    • Team_CIPA
    • Sprint 3
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      A basis for completing unit testing and test synthesis of firmware IP blocks and libraries has been developed and integrated into the gitlab Ci/CD pipeline.

      Unit testing is done using the VUnit testing framework. This generates a junit style report that is uploaded to Gitlab as an artefact.
      Synthesis testing is done using a wrapper file that mocks the DeTrI register bus and assigns the other ports to virtual pins. This is compiled with quartus which generates reports from synthesis and fitting and timing. These reports are parsed with python code.

      Example firmware IP repository with CI/CD pipeline enabled: https://gitlab.drao.nrc.ca/SKA/util/packet_generator

      I expect that this CI/CD flow for firmware will continue to be developed and improved.

      Show
      A basis for completing unit testing and test synthesis of firmware IP blocks and libraries has been developed and integrated into the gitlab Ci/CD pipeline. Unit testing is done using the VUnit testing framework. This generates a junit style report that is uploaded to Gitlab as an artefact. Synthesis testing is done using a wrapper file that mocks the DeTrI register bus and assigns the other ports to virtual pins. This is compiled with quartus which generates reports from synthesis and fitting and timing. These reports are parsed with python code. Example firmware IP repository with CI/CD pipeline enabled: https://gitlab.drao.nrc.ca/SKA/util/packet_generator I expect that this CI/CD flow for firmware will continue to be developed and improved.
    • 10.5
    • Stories Completed, Integrated, Outcomes Reviewed, Demonstrated, Satisfies Acceptance Criteria, Accepted by FO
    • PI24 - UNCOVERED

    • TALON-Infra TDC Team_CIPA

    Description

      In the early stages of prototyping standardization was not enforced and each firmware designer selected preferred development environment. Firmware developed so far does not include framework for continuous integration.  The intention is to create a framework for firmware development to facilitate code re-use, code reviews, continuous integration and adoption of standards.  

      To do:

      Setup Gitlab runners to execute CI workflows for simulation and firmware builds.

      • For existing repositories with Vunit based testbenches.
        • Explore reporting and notification options.
      • For each persona in the existing TalonDX firmware setup.
        • Setup nightly synthesis and elaboration builds (30 to 60 mins) to check successful synthesis
          • report and log changes in warnings reported
        • Setup weekly full builds on the develop branch
          • report and log changes in resource usage, static timing
        • Setup monthly full builds on the master branch

      This should help maintain a healthy code base by raising issues earlier and when breaking changes are made.

      This should give engineers the confidence to attempt code changes and maintenance knowing that the CI system will catch and alert them to unexpected affects of a change.

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                v.mohile Mohile, Vivek
                s.vrcic Vrcic, Sonja
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                Feature Progress

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                  Feature Estimate: 3.0

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