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  1. SAFe Program
  2. SP-440

Mid.CBF to DISH - generate test vectors using external DDR4

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      Early verification of the implementation of Mid.CBF interface with DISH.

      In the same manner as SP-155,  the content of the packets is generated in advance,  but in this case content is stored in DDR4 memory which allows longer data sequences to be stored. 

       

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      Early verification of the implementation of Mid.CBF interface with DISH. In the same manner as SP-155 ,  the content of the packets is generated in advance,  but in this case content is stored in DDR4 memory which allows longer data sequences to be stored.   
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      DISH emulator implemented on TALON-DX Board generates SPEAD packets using content stored in DDR4. 

      1. Software running on HPS generates content and stores in DDR4.

      2. DISH packet generator uses the content stored in DDR4 to generate DISH packets as defined in the ICD DISH to Mid.CBF (Band 2).

      Show
      DISH emulator implemented on TALON-DX Board generates SPEAD packets using content stored in DDR4.  1. Software running on HPS generates content and stores in DDR4. 2. DISH packet generator uses the content stored in DDR4 to generate DISH packets as defined in the ICD DISH to Mid.CBF (Band 2).
    • 4
    • 4
    • 1.25
    • Team_CIPA
    • Sprint 4
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      Results are contained in the following DRAO GitLab repositories.

      talon_dx : created a "LSTV" branch; added byteenable for emifs; changed emif parameters for 2400 speed grade ddr4s

      https://gitlab.drao.nrc.ca/SKA/TalonDX/FW/talon_dx.git

      vcc_base: created a "LSTV" branch; changed the Manifest file to redirect dish_test repo to its "LSTV" branch

      https://gitlab.drao.nrc.ca/SKA/Mid.CBF/FW/base/vcc_base.git

      dish_test: created a "LSTV" branch; added a lstv buffer and statemachine to manage lstv data; added a register in the json file; modified test shell scripts for hps

      https://gitlab.drao.nrc.ca/SKA/Mid.CBF/FW/persona/dish_test.git

      Show
      Results are contained in the following DRAO GitLab repositories. talon_dx : created a "LSTV" branch; added byteenable for emifs; changed emif parameters for 2400 speed grade ddr4s https://gitlab.drao.nrc.ca/SKA/TalonDX/FW/talon_dx.git vcc_base: created a "LSTV" branch; changed the Manifest file to redirect dish_test repo to its "LSTV" branch https://gitlab.drao.nrc.ca/SKA/Mid.CBF/FW/base/vcc_base.git dish_test: created a "LSTV" branch; added a lstv buffer and statemachine to manage lstv data; added a register in the json file; modified test shell scripts for hps https://gitlab.drao.nrc.ca/SKA/Mid.CBF/FW/persona/dish_test.git
    • 5.1

    • PI24 - UNCOVERED

    • Mid.CBF-to-DISH Team_CIPA goal4

    Description

      Create a prototype that generates DISH packets using content stored in DDR4 memory.

      Software running on the HPS generates the content to be transmitted and writes in DDR4.

      The prototype will be used for testing and verification of the Mid.CBF to DISH interface, this feature extends capabilities implemented by SP-155 and SP-156.

      Attachments

        1. lstv_captute.txt
          23 kB
        2. firmware_changes.docx
          127 kB
        3. dish_ivs.pdf
          311 kB

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          depends on

          Feature - A Feature is a service that fulfills a stakeholder need. Each feature includes a benefit hypothesis and acceptance criteria, and is sized or split as necessary to be delivered by a single Agile Release Train (ART) in a Program Increment (PI). SP-155 DISH to Mid.CBF - Generation and transmission of DISH packets with a known test data pattern using on-chip memory.

          • Not Assigned - Priority is not assigned yet.
          • Done

          Feature - A Feature is a service that fulfills a stakeholder need. Each feature includes a benefit hypothesis and acceptance criteria, and is sized or split as necessary to be delivered by a single Agile Release Train (ART) in a Program Increment (PI). SP-156 DISH to Mid.CBF Interface - Reception and verification of DSH packets with a known test data pattern.

          • Not Assigned - Priority is not assigned yet.
          • Done
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                b.alachkar Alachkar, Bassem
                s.vrcic Vrcic, Sonja
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