Implement integration plan for FPGA FDAS

https://miro.com/app/board/uXjVN7ik-wg=/?moveToWidget=3458764575152057581&cot=14

Who?

• PSI engineers; PSS developers

Why?

• This work will enable the use of the Frequency Domain Acceleration Search (FDAS) FPGA code in end-to-end tests with test vectors. Together with the rest of the integrated components of the pulsar acceleration branch of Cheetah, it will enable PSI/AIV engineers and commissioning scientists to test and verify PSS functionality against pulsar search requirements and to search a PSS beam for periodic signals in early commissioning observations.
• The FPGA-based pulsar search pipeline is the most complex part of PSS and in order to ensure that it meets the performance, efficacy and efficiency requirements extensive testing ahead of AA2 is necessary:
  • In PI20 we tested the firmware and FPGA interfaces in a standalone environment
  • In PI21 we planned the integration plan for FPGA FDAS with the PSS pipeline (control and processing layer)
  • This PI: We are now ready to start implementing the integration plan
  • Next: End-to-end product testing with test vectors, from data ingest to folded candidates, to ensure that the interfaces between modules work correctly, candidates are correctly identified, and the filterbank data are folded with the correct parameters

What?

This Feature will continue the implementation of the plan to support Agilex FPGA processing with FDAS, as part of the PSS pipeline (Cheetah). In particular, it will deliver an implementation for the efficient data transfer of spectra from CXFT and candidates to FLDO, into and out of the FPGA FDAS modules. In addition, it will deliver support for instantiating and using an Agilex FPGA device when running a PSS pulsar search pipeline.

Acceptance Criteria

• A CXFT module in Cheetah computes spectra, based on the selected implementation of an FFT algorithm, and stores them in memory for FDAS, using an efficient in-memory data management and transfer solution
• The FPGA FDAS module in Cheetah generates a list of candidates per DM and stores it in memory for SIFT, using an efficient in-memory data management and transfer solution
• Cheetah will be capable of instantiating the FPGA device and loading the firmware for processing with FDAS module