Implement capture of pulsar-candidate list output from the FPGA FDAS component

The 18 DM Spectrums used in SP-3597 have been successfully processed by the software developed in SP-3597 that controls the Intel Agilex FDAS FPGA in the PCIe slot of the Host PC. The detail is given below in the outcomes for each story:- ============================================== AT4-1140 The spike was intended to learn how the Linux MSI-X (Message Signalled Interrupt) works with the FDAS host code and FPGA program. The host code is based on the Linux eventfd and epoll (signalling mechanisms to wait for events of file descriptors). The CLD, CONV, and HSUM FPGA modules trigger an interrupt, and the host code receives notification of these interrupts. It is possible to see interrupt notifications as messages in the output console.  ============================================== AT4-1141 The host code implementation can extract from the relevant memory location of the FPGA a candidate list of every FFT-DM processed. The information was saved in a C++ vector structure with information on the harmonic, fop-column, fop-row, and power. ============================================== AT4-1142 The extracted candidate list was converted to a combined candidate list (CCL) format. The CCL format is composed of the FFT-DM identifier, the number of the harmonic, the fop-column converted to harmonic frequency, the fop-row converted to acceleration, and the power kept as it came from the original list. The results in this case were saved to a file. ============================================== AT4-1143 The Pulsar Candidate list from the processing of the 18 DM spectrums is attached to the AT4-1143 ticket as "ccl_annotate_4.docx". From analysing these results it has been possible to identify the associated test vector for each set of results and also perform a "manual sift" of the combined candidate list to identify the pulsar frequency and orbital acceleration or each pulsar candidate which is summarised in the file "MANUAL_SIFTED_RESULT_SUMMARY_WITH_AT4-1135_config1_sum1_global_4_3b.txt" which is also attached to the ticket AT4-1143.    The summary is that in all cases the pulsar in the test vector was identified with regard to frequency and orbital acceleration. For all these tests an acceleration step size of the filter output plane (FOP) of 10.3m/s/s has been assumed. However further analysis provides a more accurate value of 10.4m/s/s which would actually provide an even better orbital acceleration alignment between the test vector and the results and indicated in the file: "MANUAL_SIFTED_RESULT_SUMMARY_WITH_AT4-1135_config1_sum1_global_4_4.txt" also attached to ticket AT4-1143   The Intel Agilex FDAS FPGA and supporting software driver are now ready to be integrated in the the Cheetah pipeline.