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  1. SAFe Program
  2. SP-1697

Establish pipeline demonstrating a (possibly GPU) processing function

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    • Feature
    • Should have
    • PI11
    • COM SDP SW
    • None
    • Data Processing
    • Hide

      If we utilise re-usable processing functions in the data-processing pipelines we will provide the required data-processing functionality in a flexible and scalable way which will ensure a solution suitable for the needs of the SKA.

      Show
      If we utilise re-usable processing functions in the data-processing pipelines we will provide the required data-processing functionality in a flexible and scalable way which will ensure a solution suitable for the needs of the SKA.
      • Required code is integrated into the relevant repository.
      • Demonstrated use of a processing function in one or more continuum imaging pipelines.
      • Documentation is provided of how the relevant pipelines can be used.
    • 2
    • 2
    • 12.5
    • Team_HIPPO, Team_NZAPP
    • Sprint 5
    • Hide

      Outcomes from NZAPP:
      Four Cuda kernels have been prepared and onboarded at https://gitlab.com/ska-telescope/sdp/ska-gridder-nifty-cuda. Two kernels used for the Nifty gridder were adapted to also be used for the Nifty degridder, and a new kernel reverse_w_screen_to_stack used in the degridder to invert the third gridder kernel apply_w_screen_and_sum.
      HiPPO have integrated these kernels into RASCIL and NZAPP into the SEP Cuda imaging/calibration pipeline.
      Both integrations were demonstrated in System Demo 11.6 on 25 August 2021, along with verification of accuracy against the C++ Nifty gridder/degridder reference code.

      Outcomes from HIPPO:
      The GPU versions of both 3D nifty gridder and de-gridder supplied by the NZAPP team were provided with python wrappers (python wrapper for gridder was started in PI10 by the SIM) and integrated into the RASCIL imaging pipeline. The details about integration could be found in HIP-17 ticket for gridder and its related confluence page (https://confluence.skatelescope.org/display/SE/HIP-17%3A+Integrate+the+GPU+nifty+gridder+into+Rascil) and de-gridder in HIP-43 (https://jira.skatelescope.org/browse/HIP-43). The RASCIL pipeline with GPU functions was compared with the RASCIL pipeline that used CPU functions only. The comparison did not reveal any major discrepancies (https://confluence.skatelescope.org/display/SE/HIP-20%3A+Run+continuum+imaging+pipeline+with+GPU+gridder). The performance with and without GPU function was also evaluated.

      The RASCIL pipeline is up to 2.5x faster for large images (8192x8192) when GPU gridder and degridder is used. However, a number of issues were discovered with the DASK scheduler, which does not fully support GPUs. These are discussed in (https://confluence.skatelescope.org/display/SE/HIP-36%3A+Investigate+CUDA+errors+in+continuum+imaging+pipeline) and in (https://confluence.skatelescope.org/display/SE/HIP-35%3A+Investigate+the+maximum+number+of+frequency+channels+in+WAGG+workflows);

      Repository for the gridder and de-gridder python wrappers: https://gitlab.com/ska-telescope/sdp/ska-gridder-nifty-cuda/-/tree/sim-874-python-wrapper

      Changes to the RASCIL pipeline: https://gitlab.com/ska-telescope/external/rascil/-/tree/hip-17_wagg_context

      The work was presented during 11.6 demo session: https://confluence.skatelescope.org/display/SE/2021-08-25+DP+ART+System+Demo+11.6

      Future work: Investigate DASK options and possibilities of GPU scheduling.

      Show
      Outcomes from NZAPP: Four Cuda kernels have been prepared and onboarded at https://gitlab.com/ska-telescope/sdp/ska-gridder-nifty-cuda . Two kernels used for the Nifty gridder were adapted to also be used for the Nifty degridder, and a new kernel reverse_w_screen_to_stack used in the degridder to invert the third gridder kernel apply_w_screen_and_sum. HiPPO have integrated these kernels into RASCIL and NZAPP into the SEP Cuda imaging/calibration pipeline. Both integrations were demonstrated in System Demo 11.6 on 25 August 2021, along with verification of accuracy against the C++ Nifty gridder/degridder reference code. Outcomes from HIPPO: The GPU versions of both 3D nifty gridder and de-gridder supplied by the NZAPP team were provided with python wrappers (python wrapper for gridder was started in PI10 by the SIM) and integrated into the RASCIL imaging pipeline. The details about integration could be found in HIP-17 ticket for gridder and its related confluence page ( https://confluence.skatelescope.org/display/SE/HIP-17%3A+Integrate+the+GPU+nifty+gridder+into+Rascil ) and de-gridder in HIP-43 ( https://jira.skatelescope.org/browse/HIP-43 ). The RASCIL pipeline with GPU functions was compared with the RASCIL pipeline that used CPU functions only. The comparison did not reveal any major discrepancies ( https://confluence.skatelescope.org/display/SE/HIP-20%3A+Run+continuum+imaging+pipeline+with+GPU+gridder ). The performance with and without GPU function was also evaluated. The RASCIL pipeline is up to 2.5x faster for large images (8192x8192) when GPU gridder and degridder is used. However, a number of issues were discovered with the DASK scheduler, which does not fully support GPUs. These are discussed in ( https://confluence.skatelescope.org/display/SE/HIP-36%3A+Investigate+CUDA+errors+in+continuum+imaging+pipeline ) and in ( https://confluence.skatelescope.org/display/SE/HIP-35%3A+Investigate+the+maximum+number+of+frequency+channels+in+WAGG+workflows ); Repository for the gridder and de-gridder python wrappers: https://gitlab.com/ska-telescope/sdp/ska-gridder-nifty-cuda/-/tree/sim-874-python-wrapper Changes to the RASCIL pipeline: https://gitlab.com/ska-telescope/external/rascil/-/tree/hip-17_wagg_context The work was presented during 11.6 demo session: https://confluence.skatelescope.org/display/SE/2021-08-25+DP+ART+System+Demo+11.6 Future work: Investigate DASK options and possibilities of GPU scheduling.
    • 14.2
    • Stories Completed, Integrated, Outcomes Reviewed, NFRS met, Demonstrated, Satisfies Acceptance Criteria, Accepted by FO

    Description

      Following from the proof of concept work in PI10 on SP-1552, features SP-1694, SP-1695 and SP-1737 seek to provide several GPU processing functions for use in the current continuum imaging pipelines. As these processing functions become available, they should be incorporated into one or more of the relevant pipelines, such that the processing function can be called and used. The relevant pipelines are those within the continuum imageing repository https://gitlab.com/ska-telescope/sdp/ska-sdp-continuum-imaging-pipelines. This should ensure where possible that the interface used adheres to any relevant descriptions of the proposed interface as a result of the spike SP-1675.

      Further information relating to the outlined architecture relevant to this work can be found in the relevant Solution Intent architectural views https://confluence.skatelescope.org/display/SWSI/SDP+Module+Views

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                D.Fenech Fenech, Danielle
                f.graser Graser, Ferdl
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