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  1. SAFe Program
  2. SP-1567

Prepare for firmware verification system

Details

    • Obs Mgt & Controls
    • Hide
      • Firmware Verification Guideline document describing how to write testbenches using VUnit.
      • Top level script working on currently implemented tests 
      • Plan for maintaining and expanding VS going forward.
      Show
      Firmware Verification Guideline document describing how to write testbenches using VUnit. Top level script working on currently implemented tests  Plan for maintaining and expanding VS going forward.
    • 1.2
    • 2
    • 10.833
    • Team_MCCS
    • Sprint 5
    • Hide
      • Firmware Verification Guideline document describing how to write testbenches using VUnit.
        Work has begun on the writing of the Verification Guideline documentation following the review of existing VHDL verification framework (MCCS-415) by the new firmware development team members. This work is not trivial, but has begun. We expect to deliver the first version of these guidelines in iteration 11.1, just outside of PI10 as hoped, but in time for the arrival of the team's new verification engineer.
      • Top level script working on currently implemented tests 
        A VHDL testbench template has been started, based upon findings of MCCS-416. MCCS-417 will see this complete in iteration 11.1.
      • Plan for maintaining and expanding VS going forward.
        MCCS-416 evaluated features of VUnit for going forward using test bench. The reccomendation are set out in the Outcomes of MCCS-416.
      Show
      Firmware Verification Guideline document describing how to write testbenches using VUnit. Work has begun on the writing of the Verification Guideline documentation following the review of existing VHDL verification framework (MCCS-415) by the new firmware development team members. This work is not trivial, but has begun. We expect to deliver the first version of these guidelines in iteration 11.1, just outside of PI10 as hoped, but in time for the arrival of the team's new verification engineer. Top level script working on currently implemented tests  A VHDL testbench template has been started, based upon findings of MCCS-416. MCCS-417 will see this complete in iteration 11.1. Plan for maintaining and expanding VS going forward. MCCS-416 evaluated features of VUnit for going forward using test bench. The reccomendation are set out in the Outcomes of MCCS-416.
    • 10.6
    • Stories Completed, Integrated, Outcomes Reviewed, NFRS met, Satisfies Acceptance Criteria, Accepted by FO
    • PI22 - UNCOVERED

    • MCCS_firmware Team_MCCS
    • SPO-1006

    Description

      A firmware verification environment is needed in order to run regression tests and simulation. This is desirable as new developer join the firmware group and new features are added into the firmare. 

      A basic verification environment is already in place in the firmware repository using VUnit framework. VUnit is an open source unit testing framework for VHDL/SystemVerilog released under the terms of Mozilla Public License, v. 2.0. It features the functionality needed to realize continuous and automated testing of your HDL code.

      https://vunit.github.io/

      A small number of automatic testbenches are already in place, however a lot of work is still needed to increase coverage.

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                v.mohile Mohile, Vivek
                r.braddock Braddock, Ralph
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                Feature Progress

                  Story Point Burn-up: (100.00%)

                  Feature Estimate: 1.2

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                  To Do00.0
                  In Progress   00.0
                  Complete59.0
                  Total59.0

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