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Type: Spike
Priority: Should have
Fix Version/s: None
Component/s: MID CBF, MID CBF SW
Labels:
- TALON-Infra
- Team_CIPA

ARTs:

MID ART
Benefit hypothesis:
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The completion of the TALON-DX Board Support Package is critical to users of the TALON-DX board. These users include:

CIPA team developing TALON Demonstration Correlator (TDC)

DSH SPFRx Team developing Band 1/2 Digitizer prototype

The purpose of this feature is to provide a development environment and tools to translate the firmware IP block register set (which defines the interface between software and firmware) to TANGO API (attributes), to provide means for a TANGO Device to obtain the base address for the firmware IP Block register set, and facilitate access to register sets, so that TANGO Devices/Servers in Linux user space can use Linux system calls to access FPGA registers.
Show
The completion of the TALON-DX Board Support Package is critical to users of the TALON-DX board. These users include: CIPA team developing TALON Demonstration Correlator (TDC) DSH SPFRx Team developing Band 1/2 Digitizer prototype The purpose of this feature is to provide a development environment and tools to translate the firmware IP block register set (which defines the interface between software and firmware) to TANGO API (attributes), to provide means for a TANGO Device to obtain the base address for the firmware IP Block register set, and facilitate access to register sets, so that TANGO Devices/Servers in Linux user space can use Linux system calls to access FPGA registers.
Acceptance criteria:

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FPGA can be successfully re-configured with different or the same bitstream.

After bit stream re-configuration software running in user space can obtain the base address for the firmware IP block it monitors and controls, and can access the registers to read and write content.

Developers and user guides updated for the latest version of software are available, code is well documented.

Show
FPGA can be successfully re-configured with different or the same bitstream. After bit stream re-configuration software running in user space can obtain the base address for the firmware IP block it monitors and controls, and can access the registers to read and write content. Developers and user guides updated for the latest version of software are available, code is well documented.
Feature Points:
3
Cost of Delay:
3
WSJF:
1
Epic Link:
AA0.5 MID Digital Signal Chain Processing
Story Point Burn-up:
Overdue:
Resolved PI.Sprint:
20.3

Labels_MIRO:
TALON-Infra Team_CIPA

Description

TALON infrastructure provides the development environment and tools to translate the firmware IP block register set (which defines the interface between software and firmware) to TANGO API (attributes), this is used as the starting point for development of TANGO devices that control and monitor firmware. The purpose of this feature is to develop software infrastructure which provides means for a TANGO Device to obtain the base address for the firmware IP Block register set (for each instance of IP block within the programmed FPGA bitstream) and to facilitate access to firmware registers, so that TANGO Devices/Servers running in the Linux user space can use Linux system calls to access FPGA registers.

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People

Assignee:: Avison, Adam

Reporter:: Pleasance, Michael

Votes:: 0 Vote for this issue

Watchers:: 0 Start watching this issue

Feature Progress

Story Point Burn-up: (0%)

Feature Estimate: 3.0

	Issues	Story Points
To Do	0	0.0
In Progress	0	0.0
Complete	0	0.0
Total	0	0.0

Dates

Created:: 03/Sep/20 9:14 PM

Updated:: 22/Oct/23 7:52 PM

Resolved:: 22/Oct/23 7:52 PM

TALON Infrastructure - FPGA Partial Configuration